1. Field of the Invention
This invention relates to high speed data communication systems. More particularly, the invention relates to apparatus and methods for monitoring and controlling such data communications.
2. Description of the Prior Art
An Event Driven Interface (EDI) is described in U.S. Pat. No. 5,365,514 issued Nov. 15, 1994 and U.S. Pat. No. 5,375,070 issued Dec. 20, 1994, both of which are assigned to the same assignee as that of the present invention and are incorporated herein in their entirety by reference. The '070 patent describes a system and process that allows the collection of traffic events to be organized and ordered so that the relationships between the events and the events themselves can be identified as a state or a series of states which describe and allow control of performance aspects of the protocol activity in the network. More specifically, the '070 patent describes dynamic programming of multiple devices for the purpose of coordination and correlation of events such that monitoring, performance analysis and control can be accomplished on a real time basis for any high speed network. The '514 patent describes a sub-system in the '070 patent for monitoring and control of the data communications network. The network communicates a serial stream of binary bits having a characteristic pattern. The system includes a control vector generator for generating a control vector C(i) which describes the characteristic pattern and an event vector analyzer for generating an event vector E(i) which represents a plurality of occurrences of the pattern on the network.
In monitoring and controlling networks, the event driven interface (EDI) requires an array of counters to store the traffic patterns identified as indicative of various traffic conditions. From time to time, the information collection architecture, which the EDI is a part of, must be reconfigured due to changing monitoring and control requirements of the high speed data communications network. For each new reconfiguration, the counter array must be adapted to capture any new data. As the counters are reconfigured, different line delays, different line loadings and different layouts alter the counting process with the risk of possibly not meeting timing requirements on the network. A reconfigurable standard hardwired counter having a substantially uniform electrical characteristic and permitting a wide variety of traffic patterns to be counted by the EDI without the introduction of timing problems would advance the state of monitoring and controlling the performance of high speed networks.
In the prior art, the following patents address related subject matter to the present invention, as follows:
IBM TDB Bulletin September 1991, page 51, describes an internal performance measurement counter which uses programmable counters for counting hardware events or event duration in a data processing system, not traffic patterns in a high speed data communication network. When the counters are half full or a specific counter is to be changed, microcode is initiated in the systems to accumulate counts in a main store or switch the counter to count different events.
IBM TDB, May 1992, page 269 describes a SRAM-based counter to track protocol timing and monitor statistics for all ports in a local area network environment. The counter minimizes problems with respect to register-based counters from a space standpoint and limitations in expanding such counters due to unforeseeable conditions at the time of system implementation.
U.S. Pat. No. 5,051,947 issued Sep. 24, 1991 describes a text processor including cell arrays which can be configured in such a way as to link counters of adjacent cells together to form a single virtual counter with N times as many bits as a single counter. The cell arrays are programmable in such a way as to effectively extend the limited length of a counter in each cell to an arbitrarily larger counter. However, the '947 counter is not adapted to count different events.
U.S. Pat. No. 5,081,297 issued Jan. 14, 1992, discloses a reconfigurable signal processing device that includes a plurality of programmable modules which are reconfigurable to form one of a plurality of selected signal processing functions. The '297 patent is directed to analyzing patterns of analog signals, not digital signals. Further, the '297 patent does not program counters into arbitrary sizes or manage them into different configurations. Also, the '297 patent is not directed to managing counters into larger size counters but rather into different module configurations such as an accumulator, an address register, a delay circuit, a timer, etc.
U.S. Pat. No. 3,714,635 issued Jan. 30, 1973, describes a programmable adapter with counters that may be chained together for longer counts. A chaining gate responsive to a bit multiplies counters together. When the bit is on, a binary counter will start when the counter in the previous segment has been reduced to zero. The chaining feature permits a standard adapter to be loaded by a program with various parameters necessary to identify and control a specific operation on any particular unit. This feature eliminates the requirements for specially designed interface adapters for each IO device to be controlled by a computer/controller system.
U.S. Pat. No. 5,109,503 issued Apr. 28, 1992, discloses a reconfigurable counter that may be programmed to emulate a plurality of different counter types. The reconfigurable counter is used in conjunction with a program logic controller. Alternatively, the counter may be used with various host devices such as a personal computer or as a stand alone with various operator interface devices, such as a typical keyboard or key pad. The '503 counter is not a dynamically reconfigurable, hardwired counter, but rather programmed in memory to emulate a plurality of different counter types.
None of the prior art provides a solution to the problem of reconfiguring a standard hardwired counter into variable sizes and for an EDI device in selectively collecting traffic patterns on a data communications network for monitoring and control purposes.